1. Field of the Invention
The present invention relates to the formation of metal interconnects on semiconductor wafers. More particularly, the present invention relates to the formation of barrier layers to prevent diffusion of copper.
2. Description of the Related Art
As integrated circuit devices grow smaller and smaller, higher conductance and lower capacitance is required of the interconnects. That is, as integrated circuits become smaller, it becomes more desirable to reduce interconnection delays through the selection of materials used in the interconnects and associated dielectric layers. The propagation delays through the interconnects are proportional to the resistance of the interconnects and the capacitance offered by the dielectric. In fact, as integrated devices become smaller, the resistance capacitance (RC) delay time of signal propagation along interconnects becomes the dominant factor limiting overall chip speed. In order to accommodate these objectives, the trend has been towards the use of copper for interconnects and damascene methods for forming the interconnects.
Copper has gained favor in the industry because of its many advantages, including its low resistance. In such processes, conducting metal (e.g., copper) is inlaid into trench and via structures of insulating material (e.g., low-k dielectric materials). CMP (Chemical Mechanical Polishing) is used to remove conducting metal (e.g., copper) in single or dual damascene processes. One drawback to the use of copper in as the conductive metal in the interconnect lines is its tendency to diffuse (i.e., leakage) into adjacent dielectric layers. Copper diffuses easily into dielectric layers, e.g., silicon dioxide or oxide, and diminishes the electrical insulation qualities of the dielectric.
Copper barrier layers, for example layers containing tantalum, have been deposited before the deposition of copper to prevent “leakage”. Barrier layers must be able to prevent diffusion, exhibit low film resistivity, have good adhesion to dielectric and Cu and must also be CMP compatible. Also the layer must be conformal and continuous to fully encapsulate Cu lines with as thin a layer as possible. Due to higher resistivity of barrier material, the thickness should be minimized for Cu to occupy the maximum cross-sectional area.
Current barrier layers may include titanium (Ti), tantalum (Ta), and derivatives of these metals such as nitrides and carbides of these metals. Silicon nitrides and carbides are also being employed as effective barriers. One example of a silicon carbide barrier layer provides a first silicon carbide layer, on which a thick oxide deposition is placed. Another silicon carbide layer is placed over the oxide deposition. Another oxide deposition is placed over the second silicon carbide layer. The silicon carbide acts as a barrier for copper diffusion.
Providing thin barrier layers also avoids increasing the dielectric constant of the oxide. Current methods of forming barrier layers may be too porous or may be difficult to control to provide a thin barrier layer or may not be sufficiently pure.
Accordingly, it is desirable to provide more effective barrier layers that are thin, have a high purity, and low porosity.